The present invention relates to a semiconductor device and a manufacturing method thereof. The present invention relates particularly to a small-sized semiconductor device corresponding to a wafer level chip size package (W-CSP) and a manufacturing method thereof.
There has been an increasing demand for miniaturization and thinning of a semiconductor device with semiconductor elements being packaged therein. There has been proposed a CSP (Chip Scale Package) wherein spherical terminals are disposed on the surface sides of semiconductor elements in lattice form in the field of a demand for its thinning in particular. There has also been proposed a wafer level chip size package (W-CSP) built into a CSP in a wafer state.
The W-CSP is one in which individual semiconductor devices formed on a wafer are fractionized and divided by a dicing saw or the like. However, cut surfaces are exposed at the side surfaces of the fractionized semiconductor devices, and fine cracks and chipping occur.
Therefore, in order to prevent the occurrence of such chipping and cracks, there has been proposed a semiconductor device molded with a resin after grooves or trenches relatively wide in width are formed in areas to be diced (refer to, for example, patent documents 1 (Japanese Unexamined Patent Publication No. Hei 10(1998)-79362), 2 (Japanese Unexamined Patent Publication No. 2000-260910) and 3 (Japanese Unexamined Patent Publication No. 2006-100535)).
Since, however, all of the above-described semiconductor devices on the semiconductor wafer including the trenches at any thereof are molded with the same resin, a resin must be selected which combines both adhesion to the semiconductor wafer and an electrical insulating property. That is, the resin charged into the trenches must be firmly adhered to the semiconductor substrate even after dicing. On the other hand, there is a need to select a resin having insulation enough to suppress leak current. Thus, the selection of a resin most appropriate to respective spots has been required.
Such a semiconductor device and its manufacturing method will be explained specifically.
FIG. 5(A) is a sectional view of a semiconductor wafer prior to execution of mold formation. As shown in FIG. 5(B), trenches 132 are respectively formed in dicing areas of a semiconductor wafer 131. The trenches 132 are formed in all the dicing areas of the surface of the wafer. Next, as shown in FIG. 5(C), the trenches 132 are filled with a mold resin 133. As a matter of course, the mold resin layer 133 is formed even within the trenches 132. Thereafter, as shown in FIG. 5(D), the mold resin layer 133 is polished or ground to form a mold resin layer 134 having a desired thickness. Finally, as shown in FIG. 5(E), full cut portions 135 are respectively formed in the trenches 132 with widths each narrower than the width of each trench 132. With the formation of the full cut portions 135, the mold resin layers 134 lying within the trenches 132 are also separated from one another and left behind as grip portions.
Thus, the conventional semiconductor device involves the above-described problem because the compositions of the grip portions and other portions are comprised of the same resin portion.
The following problems arise in the method for manufacturing the semiconductor device having the above-described grip structure. In order to make adaptation to an actual manufacturing process, there was a need to take some measures thereagainst.
Since the trenches 132 are first formed and the mold resin layer 133 is formed in the conventional manufacturing method, cracks of the semiconductor wafer 131 occur with the trenches 132 as points of origin due to a pressure-applying process or the like necessary to charge the mold resin. There was a possibility that since the semiconductor element areas were exposed before the formation of the mold resin layer 133, chips and particles produced by processing of the trenches 132 would be adhered to the semiconductor element areas, thereby causing a quality problem. Further, since a state under the mold resin layer 133 cannot be confirmed where the mold resin layer 133 is formed, there is a need to provide steps for performing an inspection and measurements necessary before the formation of the mold resin layer 133. Upon this inspection, the confirmation of finished quality of each trench 132 and clean-up prior to mold processing are required again. The risk of wafer breakage with a conveying process and wafer handling becomes high. In addition, processing environments prior and subsequent to mold resin processing normally differ and processing under the environment high in cleanliness is essential before the mold resin processing. On the other hand, dicing processing executed after the mold resin processing is not normally executed under the environment high in cleanliness. Therefore, there is a need to perform the respective processes under environments and devices different in cleanliness. A problem has been presented even in terms of the maintenance and control of cleanliness.